1. Field of the Invention
The present invention relates to a fringe field switching (FFS) mode liquid crystal display device (LCD), and a method of manufacturing a fringe field switching (FFS) mode LCD that reduces the number of mask processes using a diffraction exposure.
2. Discussion of the Related Art
Many researches are actively developing a light and slim display device having a large-size screen, low power consumption, and of low cost. LCDs are favored as display devices that satisfy such requirements.
LCDs provide a higher resolution than other flat panel display devices and have rapid response characteristics resulting in high quality images similar to a cathode-ray tube (CRT) when reproducing a moving picture.
An LCD may include a color filter substrate having a common electrode material, an array substrate having a pixel electrode and liquid crystal filling a gap between the color filter and array substrates. Alternatively, a substrate may also include a board. A twisted nematic (TN) mode LCD may be used in active matrix LCDs. The TN mode LCD includes two substrates each having an electrode and a liquid crystal director twisted at 90 degrees. The TN mode LCD twists the liquid crystal director in part by supplying voltage to the electrodes.
However, the TN mode LCD is disadvantageous because of its narrow viewing angle.
In order to overcome such a disadvantage with the TN mode LCD, many researches are actively developing a new mode of LCD. Recently, an In-Plane Switching (IPS) mode LCD and a Fringe Field Switching (FFS) mode LCD have been developed.
Particularly, the FFS mode LCD provides a wide viewing angle with high permeability characteristics which differs from the IPS mode LCD.
In an FFS mode LCD, a fringe field is formed above a transparent common electrode material and a transparent pixel electrode by arranging the distance between the common electrode material and the pixel electrode shorter than a distance between a top and bottom substrate so that the liquid crystal molecules are driven above the electrodes.
FIG. 1A is a plan view of a unit pixel of an FFS mode LCD according to the related art, and FIG. 1B is a cross-sectional view of FIG. 1A taken along a line I-I′.
As shown in FIGS. 1A and 1B, a unit pixel is defined by intersecting gate lines 2 and data lines 4 on a bottom substrate and a thin film transistor (TFT) is disposed at a crossing of the gate line 2 and the data line 4.
A common electrode material 5 may be made of a transparent conductive material. The common electrode material 5 is formed at each unit pixel and may have a rectangular shape. The common electrode material 5 is connected to a common signal line 7 to constantly receive a common signal.
Also, a pixel electrode 8 is formed at the unit pixel to be overlapped with the common electrode material 5 and an insulating layer (not shown) is interposed between the overlapped the electrodes.
The pixel electrode 8 may be formed in a plate shape and may include a plurality of slits 8a to expose a predetermined portion of the common electrode material 5.
Although not shown in the drawings, the top and bottom substrates face one another and are separated at a distance greater than a distance between the pixel electrode 8 and the common electrode material 5. Liquid crystal is injected between the top and bottom substrates.
Recently, a new electrode structure that prevents color shift by forming a predetermined pattern at a transparent electrode layer of an FFS mode LCD has been introduced.
That is, a dual domain is formed on a unit pixel as shown in FIG. 1A. The dual domain is formed by diagonally forming two groups of a plurality of slits 8a with a uniform gap, where one group of the slits is symmetric with other group of slits.
FIGS. 2A through 2F are plan views for describing a method of fabricating an FFS mode LCD according to the related art.
As shown in FIG. 2A, a rectangular plate shaped common electrode material is formed on a substrate through a first mask process. Then, a second mask process is performed to form the gate line and the common line as shown in FIG. 2B.
After forming the gate line and the common line, a third mask process is performed to form an active region as shown in FIG. 2C and a fourth mask process is performed to form the data line, a source electrode and a drain electrode as shown in FIG. 2D. Then, a fifth mask process is performed to form a contact hole as shown in FIG. 2E and a sixth mask process is performed to form a pixel electrode as shown in FIG. 2F. That is, the FFS mode LCD is fabricated through at least six mask processes as shown in FIGS. 2A through 2F.
Since numerous masks are needed to fabricate the FFS mode LCD according to the related art, fabricating time and manufacturing cost both increase.
In order to overcome the disadvantages of the related art fabrication method, a diffraction exposure was introduced. The diffraction exposure allows a common electrode material, a gate line and a common signal line to be formed through one mask process. However, it is very difficult to maintain exposure uniformity and photo-resist ashing uniformity on diffraction-exposed regions because diffraction-exposed regions of the gate metal and the common electrode material metal face one another.